PCB manufacturing design
Mark position: Diagonal corners of the board
Quantity: minimum of 2, suggested 3, with additional Local Mark for boards over 250mm or with Fine Pitch components (non-chip components with pin or solder spacing less than 0.5mm). In FPC production, bad board identification is also necessary considering panel count and yield rate. BGA components require identification marks at the diagonal and the periphery.
Size: a diameter of 1.0mm is ideal for the reference point. A diameter of 2.0mm is ideal for identifying bad boards. For BGA reference points, a size of 0.35mm*3.0mm is recommended.
PCB size and splicing board
According to different designs, such as cell phones, CDs, digital cameras and other products in the PCB board size to not more than 250 * 250mm is better, FPC shrinkage exists, so the size of not more than 150 * 180mm is better.
Reference point size and diagram
1.0mm diameter reference point on PCB
Diameter 2.0mm bad plate reference point
BGA reference point (can be made by silkscreen or sunken gold process)
Fine pitch components after the MARK
Minimum component spacing
No cover lay resulting in the displacement of components after welding
Minimum component spacing to 0.25mm as the limit (the current SMT process to achieve 0.20 but the quality is not ideal) and between the pads to have solder resist oil or cover film for solder resistance.
Stencil design for manufacturability
In order to make the stencil better formed after solder paste printing, the following requirements should be taken into account when selecting the thickness and opening design.
1. Aspect Ratio greater than 3/2: For Fine-Pitch QFP, IC and other pin type devices. For example, 0.4pitch QFP (Quad Flat Package) pad width is 0.22mm and length is 1.5mm. If the stencil opening is 0.20mm, the width-thickness ratio should be less than 1.5, which means the net thickness should be less than 0.13.
2. Area Ratio (area ratio) greater than 2/3: for 0402, 0201, BGA, CSP and other small pin class device area ratio greater than 2/3, such as 0402 class component pads for 0.6 * 0.4 if the stencil according to 1:1 open hole according to the area ratio greater than 2/3 know network thickness T should be less than 0.18, the same 0201 class component pads for 0.35 * 0.3 derived from the network thickness should be Less than 0.12.
3. From the above two points to derive the stencil thickness and pad (component) control table, when the stencil thickness is limited after how to ensure the amount of tin under, how to ensure the amount of tin on the solder joint, which will be discussed later in the stencil design classification.
Stencil opening section
